![]() Unfortunately, an XPS 9350 schematic found on the internet shows definitively that the hosting PCIe port is electrically limited to an x2 (16Gbps) link. After confirming via CUDA-Z and HWiNFO that the TB3 controller was running at x2 instead of x4, it was initially thought it was a firmware problem, which Dell could fix with an update. The initial problem was brought to attention by a user inquiring why his AKiTiO TB3 PCIe enclosure with Samsung 960 Pro SSD was under-performing by 50% when connected to his XPS 9350. 5) mention that single-port TB3 SKUs can range from two to four lanes, meaning that Dell's design is technically within specifications.įor the last few weeks, users of Dell's XPS 9350, 9360, and Precision M5510 have been wondering why devices connected to their Thunderbolt 3 (TB3) ports were reported by HWiNFO and CUDA-Z as running on an x2 3.0 link (16Gbps), as opposed to the x4 3.0 (32Gbps) expected of TB3. External GPU enthusiast and developer nando4 (Nando Evan) of egpu.io was able to find the engineering specifications of the XPS 9350 and discovered that the external PCI link TB3 controller had been hardware-wired for half-bandwidth, i.e. ![]() Update: Intel's technology brief for TB3 (p. News Writer (AUS/NZL based) - Details here ![]() Are you a techie who knows how to write? Then join our Team! English native speakers welcome!
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